Morphing Machines Unveils MuDRA-1, First Silicon for an Architecture Aiming for ASIC Performance, FPGA Flexibility

Published  September 24, 2026   0
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Bengaluru Startup Morphing Machines Unveils First Silicon

Bengaluru-based fabless semiconductor startup Morphing Machines has unveiled MuDRA-1, its first taped-out chip, at SEMICON India 2026 in New Delhi. The event ran from 17 to 19 September at Yashobhoomi. The company, incubated at the Indian Institute of Science, describes the chip as a first-silicon milestone and says it was designed in India.

MuDRA-1 is a test chip for REDEFINE, the company's runtime reconfigurable many-core architecture. It is a many-core SoC built on TSMC's 28nm process. The company lists 16 RISC-V cores arranged in a 2x2 fabric, with four compute engines in each cluster, 256 KB of L1 and 2 MB of L2 memory, and a toroidal mesh interconnect. Performance is listed at 51.2 GOPS at INT8 with an 800 MHz IP clock.

The company describes REDEFINE as an architecture where a task can start as soon as its operands arrive in hardware, and any free compute element can pick up ready work instead of being tied to a fixed unit at compile time. Since its October 2025 funding announcement, the company has said REDEFINE aims to deliver ASIC-like performance with FPGA-like flexibility.

CEO Deepak Shapeti said reaching silicon required building custom ISA extensions, an MLIR compiler and runtimes in India. The company also lists FPGA prototypes and an AWS-hosted cloud emulator for software development ahead of silicon.

Shapeti said the die is back from the fab, with packaging and bring-up next. He said the company then plans to scale to advanced nodes, larger systems and AI inference. Measured results are yet to follow. A commercial-grade MuDRA is listed for Q4 2027.

Morphing Machines raised ₹38.36 crore in Series A funding in October 2025, led by IAN Alpha Fund, followed by about ₹42 crore in a second tranche in April 2026.

At the event's inauguration, Union Minister Ashwini Vaishnaw said the government will target at least 200 chip-design startups and companies under Semicon 2.0.

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