Every Pixel Has Its Own Microcontroller

Published  July 6, 2026   0
V Vishnu S
Author
8,192-Microcontroller Display Cluster

Imagine a display where every single pixel has its own brain. That's the ambitious idea creator bitluni set out to bring to life in a six-month engineering project. Instead of relying on a central GPU, the display turns every pixel into an independent computing node. The ultimate goal is a 65,536-core QVGA display, while the first working prototype already features 8,192 RISC-V microcontrollers running at 100 MHz, coordinated by 256 master processors. At the heart of the system is the WCH CH570, selected for its 100 MHz clock speed, built-in SRAM, native USB, and integrated wireless capabilities. 

Building a cluster with thousands of processors came with several engineering challenges. An early attempt to distribute a shared 32 MHz clock signal across all the microcontrollers failed after the signal degraded and  forced a complete redesign with an individual crystal oscillator for every chip. During the redesign, a layout mistake swapped the MOSI and MISO SPI communication lines, which was rescued by carefully soldering jumper wires onto existing resistor pads instead of discarding the boards. To maintain reliable communication between thousands of processors, bitluni also moved to a 6-layer PCB with dedicated ground planes and shielding to minimize signal crosstalk. Power was another major hurdle, as the full-scale design is expected to consume over 2 kW, requiring a 3000 W power supply and multiple high-current  buck converters to safely distribute 3.3 V power across the system.

Programming thousands of microcontrollers manually would have been nearly impossible, so bitluni built an automated flashing system using a Bambu Lab 3D printer fitted with a custom pogo-pin toolhead. Controlled through Home Assistant, Node-RED, and a custom Python script, the printer automatically moves from chip to chip, flashes firmware using OpenOCD, verifies the upload, and retries alignment whenever needed. The first 8,192-core hardware prototype has now been fully assembled and powered successfully, while the software needed to coordinate thousands of independent processors is still under development. 

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