Serial Memory Controller for High-performance Data Center Computing

Microchip released new SMC 1000 8x25G serial memory controller for CPUs and other compute-centric SoCs to utilize four times the memory channels of parallel attached DRAM within the same package footprint compared to DDR4. The new serial memory controller will eliminate the major roadblock for next-generation CPUs, which require an increased number of memory channels to deliver more memory bandwidth. The new SMC 1000 8x25G serial memory controller features deliver higher memory bandwidth and media independence to these compute-intensive platforms with ultra-low latency. The SMC 1000 8x25G leverages the increased number of processing cores within CPUs so the average memory bandwidth available to each processing core has decreased. This is because CPU and SoC devices cannot scale the number of parallel DDR interfaces on a single chip to meet the needs of the increasing core count. 

The SMC 1000 8x25G serial memory controller can be interfaced with CPU using 8-bit Open Memory Interface (OMI)-compliant 25 Gbps lanes and it can be bridged to memory via a 72-bit DDR4 3200 interface. This leads to a significant reduction in the required number of host CPU or SoC pins per DDR4 memory channel allowing for more memory channels and increasing the memory bandwidth available. The product features an innovative low latency design which results in memory systems using the product to have virtually identical bandwidth and latency performance to comparable LRDIMM products. The SMC 1000 8x25G integrates data and address into one unified chip when compared to LRDIMM which uses an RCD buffer and separate data buffers. 

The SMC 1000 8x25G incorporates an on-chip processor that performs control path and monitoring functions such as temperature monitoring, initialization, and diagnostics. Also, the device supports manufacturing test operations of attached DRAM memory. The device can be a foundational building block for a wide range of OMI memory applications which includes Differential Dual-Inline Memory Module (DDIMM) applications such as standard height 1U DDIMMs with capacities from 16 GB to 128 GB and double height 2U DDIMMs with capacities beyond 256 GB. 

Specifications of SMC 1000 8x25G:

For development, the Microchip also provides design-in collateral and ChipLink diagnostic tools for the SMC 1000 that provide extensive debug, diagnostics, configuration and analysts tools with an intuitive GUI. This will support the customers building systems that are compliant with the OMI standard. 

The samples of SMC 1000 8x25G is available now and can be ordered by contacting Microchip sales representative