Entry-Level Microprocessors with AI Accelerator for Increased Power Efficiency and High-Precision in Vision AI Applications

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ByRajni Setia 0

RZ/V2L Entry-Level Microprocessors with AI Accelerator

Incorporated with DRP-AI (Dynamically Reconfigurable Processor), the new entry-level RZ/V2L MPUs from Renesas Electronics Corporation can deliver increased power efficiency and high precision in vision AI applications. This new MPU handles both AI inference and image processing functions, eliminates external ISP requirements, and enables cost-efficient vision AI implementations.

The RZ/V2L MPUs are designed for entry-level AI-enabled applications and come endowed with several RZ/V2M features like high-precision AI inference capabilities and high power efficiency. Besides, it also includes optimizations such as tailoring the DRP-AI operating frequency and memory interface for an entry-level MPU.

The new MPUs in the line of the RZ/V series provides real-time AI inference and image processing functions with color correction and noise reduction capabilities that are essential for camera support. With these MPUs customers can easily develop AI-based vision applications like point-of-sale (POS) terminals and robot vacuum cleaners, without requiring an external image signal processor (ISP).

The excellent power efficiency of the device eliminates the need for heat dissipation measures such as heat sinks or cooling fans. With this device being introduced, the AI can be implemented cost-efficiently in surveillance cameras, industrial equipment, and in a wide range of applications including home appliances and consumer electronics.  Packaged- and pin-compatible with the existing RZ/G2L general-purpose MPUs, the RZ/V2L enables users to upgrade easily and enjoy additional AI functions without modifying the system configuration at bare minimum cost.

Key Features of the RZ/V2L MPUs

  • 64-bit Arm Cortex-A55 (1.2 GHz, dual or single-core) and Cortex-M33
  • DRP-AI (1 TOPS/W class) AI accelerator capable of running the Tiny YOLOv2 program at 28 frames per second (fps)
  • Simple ISP functions required for machine vision are provided in the DRP library (supports up to full HD)
  • 16-bit, single-channel DDR memory interface
  • 3-D graphics functions (Arm Mali-G31 GPU)
  • Video codec (H.264)
  • CMOS sensor interfaces (MIPI-CSI and Parallel) for camera input
  • Display interfaces (MIPI-DSI and Parallel)
  • Memory with error checking and correction (ECC)
  • Verified Linux Package (VLP) based on Civil Infrastructure Platform Linux, an industrial-grade Linux implementation, available
  • Available in 15 mm square or 21 mm square BGA packages that are pin-compatible with the RZ/G2L

The sample shipments of the RZ/V2L MPUs have already started, and mass production is scheduled to begin in December 2021.

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