Renesas Electronics Corporation has introduced a new ForgeFPGA Family that fulfills the design need for relatively small amounts of programmable logic that can be quickly and efficiently designed into cost-sensitive applications. These new ForgeFPGA devices will provide cost savings versus other alternatives, including non-FPGA designs and by providing a high level of integration, they reduce overall board and system costs. Moreover, these new FPGAs will use the same business model and infrastructure as the GreenPAK line.
The software offers two development modes to accommodate both new and experienced FPGA developers: a “macrocell mode” that uses a schematic capture-based development flow, and an “HDL” mode that provides a familiar Verilog environment for FPGA veterans. The ForgeFPGA Family will serve applications that require less than 5,000 gates of logic, with initial device sizes of 1K and 2K Look Up Tables (LUTs) and users will be able to download the development software at no cost and with no license fees.
Key Features of ForgeFPGA Family
- Very low power as low as 20 microamps standby
- Very low price in volume of well under US$ 0.50
- Free, downloadable software with no license fees that includes both schematic capture and HDL modes
- Proven ability to deliver very high volumes
The ForgeFPGA engineering samples are now available, along with beta design software and a prototype development kit. The first ForgeFPGA device, the 1K LUT offering, is expected to be available in production quantities in Q2 2022.
