Government of India Launches Ambitious Nationwide Initiative to Democratize Indigenous Semiconductor Chip Design

Published  March 21, 2025   0
Launch of a Digital India RISC-V Grand Challenge
Launch of a Digital India RISC-V Grand Challenge

India’s semiconductor ecosystem is poised for significant growth following a series of initiatives announced by the Ministry of Electronics and Information Technology. The government is working closely with over 300 organizations including 250 academic institutions and 65 start-ups to create a robust infrastructure for chip design. These efforts form part of the Chips to Start-up (C2S) Programme, which aims to develop 85000 industry-ready professionals in semiconductor chip design. The programme offers hands-on training in design, fabrication and testing, ensuring a skilled workforce for future technological advancements.

In a competitive event, 2210 teams and over 10000 students participated in Analog and Digital Design Hackathons. After rigorous coding and design challenges, the grand finale saw 40 teams and 200 innovators compete over 100 hours. The winners for the Analog Design Hackathon were Team Intuition from IIT Delhi, Team Analog Edge from NIT Rourkela and Team FETManiacs from IIT Guwahati. In the Digital Design Hackathon, winners included Team RISCB from IIT Bombay, Team Silicon Scripters from Saveetha Engineering College and Team Daedalus from IIT (BHU Varanasi).

Further strengthening domestic capabilities, the government awarded M/s Vervesemi Microelectronics Pvt. Ltd. the contract to develop a BLDC Motor Controller Chip. This chip is notable for its 90% made-in-India bill of materials and a cost of under $1.50 per unit. Vervesemi is a fabless semiconductor company that designs ASICs using various advanced process nodes including 8nm, 22nm and 28nm. This development underlines India’s commitment to boosting indigenous semiconductor solutions and promoting self-reliance in the technology sector.

The launch of the Digital India RISC-V (DIR-V) Grand Challenge marks the next phase of these initiatives. Starting from 10th April, participants will work with VEGA and SHAKTI processors with technological support from key industry partners including Renesas, LTSC, CoreEL Technologies and Bharat Electronics. The challenge will focus on developing innovative applications leveraging open-source designs to meet evolving technology demands. The government’s approach emphasizes inclusive participation from academia, start-ups and researchers, aligning with its vision for a balanced product ecosystem in semiconductor design.