circuit design 555

Ken's picture
Joined: Dec 11, 2016
circuit design 555
December 11, 2016 - 10:15pm

This is what I need

When input voltage in applied, output in high.

When input voltage is removed, output is low,  and starts a time delay

that will not be affected by applying another input voltage, until the time delay

is finished. After the delay is finished, the cycle will repeat.

B.Aswinth Raj
B.Aswinth Raj's picture
Joined: Aug 16, 2016
Use 555 Timer in mono-stable mode
December 22, 2016 - 6:52am

Hi Ken,

I would suggest you to use a 555 timer in mono-stable mode for your application. In which you could calculate your time delay by using the formulae

T = 1.1 * R * C, Where R and C are the resistor and capacitor connected accross 8,7 and 6,Gnd respectively.




You might wanna tweak the design a bit by using a NOT gate to inverse operation. If you get stuck somewhere let us know we will help you out.