A PCB board is not difficult to do, but doing a good PCB board is not easy

We say that the PCB is to do a good schematic design into a piece of real PCB board, please do not underestimate this process, there is something feasible but difficult to achieve in many engineering principles, or someone else can achieved something others did not realize, so says a PCB board is not difficult to do, but to do a good piece of PCB board is not an easy thing.

Two difficulty lies in the field of microelectronics processing high-frequency signals and weak signal in this regard PCB production level is especially important, the same design principle, the same components, different people produced the PCB will have different results then how to make a good PCB board do? Based on our past experience, to talk about their views on the following aspects:

First, to clear design goals

Receiving a design task, which is designed to clear first, an ordinary PCB board, high frequency PCB, the PCB is small signal processing have both a high frequency small-signal processing board PCB, if an ordinary PCB board, as long as the reasonable layout wiring neat, accurate mechanical dimensions can, and if the load line LT, we must use some means of processing, reduce the load, to enhance long-term drive focusing reflection preventing long.

When the board has more than 40MHz signal lines, signal lines necessary for these special considerations, such as inter-line crosstalk problems. If the frequency is higher, there is more stringent restrictions on the length of the wiring, according to the network theory of distribution parameters, the interaction between high-speed circuit and its connection is the determining factor, the system design can not be ignored. With the improvement of transmission speed door against the signal line will be a corresponding increase in crosstalk between adjacent signal lines increases in proportion, usually high-speed circuit power consumption and heat dissipation are also large, making high-speed PCB should be taken seriously enough.

When the board has millivolts or even microvolts weak signals on these signal lines need special attention, because the small signal is too weak, very susceptible to interference from other strong signal, often shielding measures are necessary, otherwise greatly reduce the signal to noise ratio. Such that the desired signal drowned by the noise can not be effectively extracted.

Commissioning of the board should also be taken into account, the physical location of test points, test points isolation and other factors in the design phase can not be ignored, because some small signal and high frequency signal is not directly coupled to the probe measuring.

Moreover, we should consider some other factors, such as the board layers, using components of the package outline, the board mechanical strength. Before doing PCB board, designed to make a pretty good idea of ​​the design.

Second, the components used to understand the function layout requirements

We know that some special components have special requirements when layout, such as an analog signal amplifier and LOTI APH used, the analog signal amplifier power requirements for a stable, small ripple. Small portions of the analog signal to be far away from the power device. In OTI-board, small signal amplification section further added dedicated shield the stray electromagnetic interference to shield off. NTOI GLINK board with the chip ECL technology, high power consumption much heat, it is necessary to heat problems must be special considerations in the layout, the use of natural cooling, it is imperative GLINK chip in place of the air flow relatively smooth and it comes out of the heat can not constitute a big impact on other chips. If the device is equipped with a horn or other high-power on the board, it may cause serious pollution to the power that should be taken seriously enough.

Third, the component layout considerations

One factor component layout first thing to consider is the electrical properties, the connection components close together as possible, especially for some high-speed line, when the layout will make it as short as possible, the power signal and small signal devices should be separated. The premise of meeting the performance of the circuit, but also consider the components neatly, appearance, ease of testing, the size of the board machine, the position of the socket, also need to be carefully considered.

Factors propagation delay time and a high-speed system, a ground line interconnecting the system design is to be considered first. Effect of the transmission time of the signal line on the overall system speed is large, especially for high-speed ECL circuit, although a high speed integrated circuit itself, but on the base plate with the common interconnection line (every line length of about 30cm 2ns delay amount) to bring delay time increases, the speed of the system can be greatly reduced as a shift register, synchronous counter which synchronization with a plug member is preferably on the board, since the on-board clock signal is different unequal propagation delay time, production of the shift register may be main error, if not on a plate, the key areas in synchronization, even from a common clock source to the clock line of each plug-in board must be the same length.

Fourth, consider wiring

With OTNI and star optical network design is complete, there will be more than 100MHz board having a high-speed signal lines need to design, some basic concepts here will introduce high-speed lines.

Transmission line

A printed circuit board of any "long" signal paths may be viewed as a transmission line. If the transmission line delay time is much shorter than the signal rise time, the reflection produced by the main signal rising period will be submerged. No longer exhibits overshoot, ringing and recoil, for the most current MOS circuits, because the rise time of the transmission line is much greater than the delay time, it can trace length in meters without signal distortion. For faster logic circuits, particularly ultra-high speed ECL.

The integrated circuit, since the edge of the fast growth rate, the absence of other measures, wiring length must be shortened, in order to maintain signal integrity.

There are two ways to make a relatively long line of high-speed circuit working without serious waveform distortion, TTL Schottky diode clamp method for fast falling edge, so that the amount of overshoot is clamped a diode drop lower than the ground potential on the level, which reduces the amplitude of the back of the recoil, allows slower rising edge overshoot, but the relatively high output impedance which is at the level "H" state of the circuit (50 ~ 80Ω) attenuated . Further, since the immunity level "H" state is large, the problem that the backlash is not very prominent, HCT series of devices, the use of a Schottky diode clamp and a method of combining the series resistance termination, which improves the effect will be more obvious.

When the fan-out along the signal line, at higher bit rates and faster edge rates, TTL shaping method described above appears to be insufficient. Because there is a reflected wave line, they will tend synthesized at a high rate, causing severe signal distortion and interference reduction. Accordingly, in order to solve the problem of reflection, the ECL system in another method commonly used: line impedance method. In this way the reflector can be controlled, signal integrity is guaranteed.

Strict He said that for conventional TTL and CMOS devices have slower edge speeds, the transmission line is not very much needed. There are faster edge speeds for high-speed ECL devices, the transmission line is not always needed. However, when using a transmission line, they have the advantage to predict interconnect delay and to control the reflection and ringing by impedance matching.

1. Decide whether to adopt the basic elements of the transmission line:

Rate along (1) the signal system, (2) from the connection (3) capacitive load (fan-out number), (4) resistive load (line termination mode); (5) and allows the recoil overshoot percentage (reduce the degree of exchange immunity).

2. Several types of transmission lines

(1) a coaxial cable and twisted pair: they are often used in connections between the system and the system. Coaxial cable characteristic impedance usually 50Ω and 75Ω, twisted-pair typically 110Ω.

(2) the microstrip lines on the printed circuit board: the microstrip line is a strip conductors (signal lines). Between the ground plane and isolated in a dielectric. If the distance between the line thickness, width and the ground plane is controlled, it is the characteristic impedance can be controlled. The characteristic impedance Z0 of the microstrip line is:

(3) the stripline printed circuit board: a strip line is placed in the middle between the dielectric layers of conductive copper strip lines plane. If the distance between the two conductive plane and a dielectric constant line width and thickness, the medium is controllable, the line characteristic impedance is controllable, stripline characteristic impedance:

3. Terminated transmission line

At the receiving end of a line terminated by a resistance equal to the characteristic impedance of the line, called the parallel transmission line is a wiring end. It is mainly in order to obtain the best electrical properties, including a drive load distribution employed.

Sometimes, in order to save power consumption, the resistor termination of a further capacitor 104 connected in series form a circuit AC termination, it can effectively reduce the DC loss.

Between the driver and the transmission line in series a resistor, and the terminal is no longer connected to the line termination resistors, this termination method is called series termination. Long line overshoot and ringing can be used in series or series damping termination technique controlled using a small series damping resistor in series with the output terminal of the gate driver (generally 10 ~ 75Ω) realized. This method is suitable for damping and the characteristic impedance of the controlled line associated with (e.g., backplane wiring, no ground plane of the circuit board and the wiring, etc. around the most.

When the series resistance value of the series termination circuit (gate driver) and output impedance equal to the characteristic impedance of the transmission line. Tandem connection end there is a drawback with using only lumped load terminal and the transmission delay in a long time. However, this the method can be overcome by the use of redundant transmission lines series termination.

4. Non-terminated transmission line

If the line delay time is shorter than the signal rise time is much, can be used without the use of a transmission line or parallel termination series terminated if a non-terminal wiring round trip delay (round trip time of the signal on the transmission line) than the pulse signal rise time is short, the recoil caused by non-terminated since about 15% of the logic swing. The maximum opening length of the route is approximately:

Lmax <tr / 2tpd

Where: tr is the rise time

delay time tpd per unit length of the transmission line

5. Comparison of several ways of termination

Parallel and series connection side wiring terminal has advantages, which actually use, or both of which are used, depending on the designer's requirements and on the system's hobby. The main advantage of parallel transmission is the end of the wiring system speed fast and complete line signals without distortion. The load on the long-term will not affect the long drive transmission drives the gate delay time, and would not affect its signal edge rate, but will in the long signal propagation delay time is increased. When driving a large fanout, load may be distributed along the branch via short, unlike in the above series termination is necessary to set the total load line terminal.

Series termination method of driving the circuit has the ability to load several parallel lines, the incremental delay time due to the series capacitive load side wiring caused about twice as large than the corresponding wiring terminal in parallel, and that the edge of the short-term due to the capacitive load slowed down and drives the gate delay time increases, however, the series connection of the ends of the parallel side wiring crosstalk ratio is smaller, mainly because the signal amplitude in the end of the series connection of transmit logic swing is only one-half, thus switching current of the parallel termination only half the switching current, small signal energy will crosstalk is small.

In doing double-sided PCB or multilayer is optional, depending on the complexity of the circuitry and the maximum operating frequency, and determines the packing density requirements. In the selection of the clock frequency is preferably more than plywood 200MHZ. If the operating frequency is more than 350MHz, the best selection of polytetrafluoroethylene as the dielectric layer of the printed circuit board, because of its high frequency attenuation to be smaller, the parasitic capacitance to be smaller, the transmission speed to be faster, since Z0 is also more large and conserve power, the printed circuit board traces on the following principle requires:

Between (1) to try all parallel signal lines leave large interval, in order to reduce crosstalk. If there are two close spaced signal lines, a ground line preferably take between the two lines, so you shield.

(2) the design of the signal transmission line to avoid sharp turn, prevent the mutations characteristic impedance of the transmission line and reflection, designed to try to form a homogeneous arc line having a certain size.

(3) the width of the tracks may vary according to the characteristic impedance of microstrip and stripline above calculation formula, the printed circuit board microstrip characteristic impedance is generally between 50 ~ 120Ω. To obtain a large characteristic impedance, the line width to be made narrow. But it is not easy to make fine lines.

A combination of factors to consider, usually choose a value of approximately 68Ω impedance more appropriate, because the choice of 68Ω characteristic impedance, can achieve the best balance between the delay time and power consumption. 50Ω transmission line will consume more power; large impedance can certainly reduce the power consumption, but will hate large transmission delay time. Since the negative result in reduced line capacitance and increase the characteristic impedance of the transmission delay time. However, the low intrinsic capacitance characteristic impedance of the line per unit length is relatively large, so that transmission delay time is less affected by the characteristic impedance and the load capacitance.

An important feature of having properly terminated transmission line is branched to the line delay time should be short no effect. When Z0 is 50Ω. The length of the branch stub must be limited to less than 2.5cm. So as not to appear a lot of ringing.

(4) For two panels (four or six panels down line). To both sides of the line circuit board perpendicular to each other, in order to prevent mutual crosstalk induced production master.

(5) If the printed board with large current devices, such as relays, lights, horn, etc., are preferably ground separately to walk alone, to reduce the noise of the line, the ground should be such high current devices It is connected to a separate plug-in board and backplane on the bus up, and these should also be independently connected to ground and the ground of the entire system.

(6) If the board has a small signal amplifier, the signal line prior to amplify weak away from strong signal line, and wiring as short as
possible, even if the land line may be masked.