89c51 GPIO Interfacing

Chetan's picture


Joined: Jan 07, 2020

Replies: 0
89c51 GPIO Interfacing
January 7, 2020 - 11:37pm

Hi there,
I have just read the theory about internal architecture of 8051 I/O ports.
According to theory P1 to P3 should be HIGH if they are to be used as input ports.Because if PORTS are LOW then the internal mosfet will always hold pin status as low and cant be changed ...making it useless as an input port.
so I tried to test this condition, I made Port1 LOW... connected an active HIGH switch to P1.0 pin and read the pin status after pressing switch and found it high.
and now I am pretty much confused about how it is becoming high and how things are going on inside? please help me to understand it.
here is my assembly code. 

org 0
mov p1,#0x00 ; PORT 1 intentionally made 00 so internal MOSFET is now active and 'should not' allow PORT pin to be high by switch
jnb p1.0,$ ;wait here till switch is not pressed (please refer the schematic for connections )
lcall delay
mov a,p1 ;Read PORT1 to Accumulator
mov p2,a ;show contents of accumulator to PORT2()
sjmp REP
mov r3,#1
mov r1,#255
mov r0,#255
djnz r0,$
djnz r1,ABC
djnz r3,XYZ

Sourav Gupta's picture


Joined: Feb 12, 2018

Replies: 696

For the respective ports, 89c51 has internal pull up resistor inbuilt. Therefore, the state changing can be happen without adding additional pull up or down resistor externally.

I am not quite sure where you get the info that the internal mosfet hold the pin low, but as fas as my memory supports me, the pin can be used as low to high state change externally.