Hi There,
I am a Btech in electrical but very keen to interest in embedded, I have gathered some little knowledge from this site which is very fantastic site for embedded persons.
I am trying to understand the topics on "IR Remote Controlled Home Automation using PIC Microcontroller" from the link "https://circuitdigest.com/microcontroller-projects/ir-remote-controlled…" after googling managed to understand most of the part of its
But I got stuck on the code as below::
// "After that, we have initialized the timer by using the following function
void timer() // 10 -> 1us
{
T0PS0=0;
T0PS1=0;
T0PS2=0;
PSA=0; //Timer Clock Source is from Prescaler
T0CS=0; //Prescaler gets clock from FCPU (5MHz)
T08BIT=0; //16 BIT MODE
TMR0IE=1; //Enable TIMER0 Interrupt
PEIE=1; //Enable Peripheral Interrupt
GIE=1; //Enable INTs globally
TMR0ON=1; //Now start the timer!
}//
------
What actually meaning of the "// 10 -> 1us" of above timer() function,
Is it mean Timer0 resister increments with 10 clock pulse for in 1usec, If so how it is coming into calculation,
As Fosc = 20Mzh,
then sys clock=5Mhz,
for PS 1:2,
Timer Frq=5/2=2.5 Mhz,
And timer interval = 0.4 usec
Thats mean, timer0 resister increment by 1 in 0.4 usec.
So, for 10 increments require 4 usec.
Please correct my concept where I am getting wrong..
---------
My next stuck point is below::
//"Whenever signal goes high or low we just put debouncing method and run the timer. IR remote send logic 0 as 562.5us and logic 1 as 2250us. Whenever timer reads around 562.5us then we assume it 0 and when timer reads around 2250us then we assume it as 1. Then we convert it in hex.
The incoming signal from remote contains 34 bits. We store all the bytes in the array and then decode the last byte to use.
while(ir == 1);
INT0IE = 0;
while(ir == 0);
TMR0=0;
while(ir == 1);
i++;
dat[i]=TMR0;
if(dat[1] > 5000 && dat[1]<12000)
{
}
else
{
i=0;
INT0IE = 1;
}
if(i>=33)
{
GIE=0;
delay(50);
cmd=0;
for(j=26;j<34;j++)
{
if(dat[j]>1000 && dat[j]<2000)
cmd<<=1;
else if(dat[j]>3500 && dat[j]<4500)
{
cmd|=0x01;
cmd<<=1;
}
}
cmd>>=1;//
INT0IE = 0; // while checked ir==1, why RB0 interrupt is made LOW here?
when check ir ==0 then load 0 to TMR0
After that how following is loaded to array from timer0,
//while(ir == 1);
i++;
dat[i]=TMR0;//
As once a button pressed of remote TSOP receive the ir burst of signal as low and high
562.5us and 2250us respcetively. sO HOW the calculaton coming for following lines,
//if(dat[1] > 5000 && dat[1]<12000)
{
} //WHAT ACTUALY EXCUTE HERE???
WITH THE ABOVE I REQUEST TO KINDLY MAKE ME UNDERSTAND REST PART WITH A TYPICAL CALCULATION IF POSSIBLE.
if(i>=33)
{
GIE=0;
delay(50);
cmd=0;
for(j=26;j<34;j++)
{
if(dat[j]>1000 && dat[j]<2000)
cmd<<=1;
else if(dat[j]>3500 && dat[j]<4500)
{
cmd|=0x01;
cmd<<=1;
}
}
cmd>>=1;
-------------------------------------
I need someone's help and i would be very gratefully for that support.
Thanks
Saj
Hi
Thnks for reply.
""What actually meaning of the "// 10 -> 1us" of above timer() function,""
""Delay = ((65536-0)*(4*2))/(5*10^6) = 0.1 sec"" :: (although it is coming at 0.105 sec)
As per yours calculations 10 increment is coming at (10*0.1) =1 Sec.
but how it is coming at 1usec as mentioned in above statement ? ?
Please help me to understand the matter.
Thanks.
I am also skeptical with what what the author means by 10-> 1us...
Did you try the code? you can print the timer overflow to check really when it gets an overflow.
Its tested in proteus and found the overflow is coming to 25ms.
Why this figure is coming??
The code is pasted here
""
#include <xc.h>
#define _XTAL_FREQ 20000000
void timer(void) // 10 -> 1us
{
T0PS0=0;
T0PS1=0;
T0PS2=0;
PSA=0; //Timer Clock Source is from Prescaler
T0CS=0; //Prescaler gets clock from FCPU (5MHz)
T08BIT=0; //16 BIT MODE
TMR0IE=1; //Enable TIMER0 Interrupt
PEIE=1; //Enable Peripheral Interrupt
GIE=1; //Enable INTs globally
TMR0ON=1; //Now start the timer!
TMR0=0;
}
void interrupt timer_isr()
{
if (TMR0IF==1)
{
value=~value;
//TMR0=0;
TMR0IF=0;
}
}
void main(void)
{
ADCON1=0b00001111;
TRISB=0;
PORTB=0;
timer();
while(1)
{
PORTB=value;
}
}
''
Pl check pic 18F2520 COFUGURATION: as pasted below::
""
//https://circuitdigest.com/microcontroller-projects/ir-remote-controlled…
// DIRECT 18F2520 TEST
// PIC18F2520 Configuration Bit Settings
// 'C' source line config statements
// CONFIG1H
#pragma config OSC = HS // Oscillator Selection bits (HS oscillator)
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)
// CONFIG2L
#pragma config PWRT = ON // Power-up Timer Enable bit (PWRT enabled)
#pragma config BOREN = SBORDIS // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled))
#pragma config BORV = 3 // Brown Out Reset Voltage bits (Minimum setting)
// CONFIG2H
#pragma config WDT = OFF // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))
#pragma config WDTPS = 32768 // Watchdog Timer Postscale Select bits (1:32768)
// CONFIG3H
#pragma config CCP2MX = PORTC // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = OFF // PORTB A/D Enable bit (PORTB<4:0> pins are configured as digital I/O on Reset)
#pragma config LPT1OSC = OFF // Low-Power Timer1 Oscillator Enable bit (Timer1 configured for higher power operation)
#pragma config MCLRE = ON // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)
// CONFIG4L
#pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config LVP = OFF // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)
#pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))
// CONFIG5L
#pragma config CP0 = OFF // Code Protection bit (Block 0 (000800-001FFFh) not code-protected)
#pragma config CP1 = OFF // Code Protection bit (Block 1 (002000-003FFFh) not code-protected)
#pragma config CP2 = OFF // Code Protection bit (Block 2 (004000-005FFFh) not code-protected)
#pragma config CP3 = OFF // Code Protection bit (Block 3 (006000-007FFFh) not code-protected)
// CONFIG5H
#pragma config CPB = OFF // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
#pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM not code-protected)
// CONFIG6L
#pragma config WRT0 = OFF // Write Protection bit (Block 0 (000800-001FFFh) not write-protected)
#pragma config WRT1 = OFF // Write Protection bit (Block 1 (002000-003FFFh) not write-protected)
#pragma config WRT2 = OFF // Write Protection bit (Block 2 (004000-005FFFh) not write-protected)
#pragma config WRT3 = OFF // Write Protection bit (Block 3 (006000-007FFFh) not write-protected)
// CONFIG6H
#pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
#pragma config WRTB = OFF // Boot Block Write Protection bit (Boot block (000000-0007FFh) not write-protected)
#pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM not write-protected)
// CONFIG7L
#pragma config EBTR0 = OFF // Table Read Protection bit (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF // Table Read Protection bit (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF // Table Read Protection bit (Block 2 (004000-005FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF // Table Read Protection bit (Block 3 (006000-007FFFh) not protected from table reads executed in other blocks)
// CONFIG7H
#pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) not protected from table reads executed in other blocks)
// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.
#include <xc.h>
#define _XTAL_FREQ 20000000
int value=0;
void timer(void) // 10 -> 1us
{
T0PS0=0;
T0PS1=0;
T0PS2=0;
PSA=0; //Timer Clock Source is from Prescaler//1 FOR WDT
T0CS=0; //Prescaler gets clock from FCPU (5MHz)1/INTERNAL INSTRUCTION CYCLE CLOCK (CLKO)//1 FOR T0CKI PIN, IF IT IS SELECT THEN T0SE IS TO SELECT
T08BIT=0; //16 BIT MODE
TMR0IE=1; //Enable TIMER0 Interrupt
PEIE=1; //Enable Peripheral Interrupt
GIE=1; //Enable INTs globally
TMR0ON=1; //Now start the timer!
TMR0=0;
}
void interrupt timer_isr()
{
if (TMR0IF==1)
{
value=~value;
//TMR0=0;
TMR0IF=0;
}
}
void main(void)
{
// int count=0;
ADCON1=0b00001111;
TRISB=0;
PORTB=0;
timer();
while(1)
{
//while(TMR0IF==1);
PORTB=value;
//TMR0IF=0;
//count++;
//if (count==10)
//{
//LATBbits.LATB3=1;
//count=0;
//}
//else
//{
//LATBbits.LATB3=0;
//}
}
}
// PIC18F2520 Configuration Bit Settings
// 'C' source line config statements
// CONFIG1H
#pragma config OSC = HS // Oscillator Selection bits (HS oscillator)
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)
// CONFIG2L
#pragma config PWRT = ON // Power-up Timer Enable bit (PWRT enabled)
#pragma config BOREN = SBORDIS // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled))
#pragma config BORV = 3 // Brown Out Reset Voltage bits (Minimum setting)
// CONFIG2H
#pragma config WDT = OFF // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))
#pragma config WDTPS = 32768 // Watchdog Timer Postscale Select bits (1:32768)
// CONFIG3H
#pragma config CCP2MX = PORTC // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = OFF // PORTB A/D Enable bit (PORTB<4:0> pins are configured as digital I/O on Reset)
#pragma config LPT1OSC = OFF // Low-Power Timer1 Oscillator Enable bit (Timer1 configured for higher power operation)
#pragma config MCLRE = ON // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)
// CONFIG4L
#pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config LVP = OFF // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)
#pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))
// CONFIG5L
#pragma config CP0 = OFF // Code Protection bit (Block 0 (000800-001FFFh) not code-protected)
#pragma config CP1 = OFF // Code Protection bit (Block 1 (002000-003FFFh) not code-protected)
#pragma config CP2 = OFF // Code Protection bit (Block 2 (004000-005FFFh) not code-protected)
#pragma config CP3 = OFF // Code Protection bit (Block 3 (006000-007FFFh) not code-protected)
// CONFIG5H
#pragma config CPB = OFF // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
#pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM not code-protected)
// CONFIG6L
#pragma config WRT0 = OFF // Write Protection bit (Block 0 (000800-001FFFh) not write-protected)
#pragma config WRT1 = OFF // Write Protection bit (Block 1 (002000-003FFFh) not write-protected)
#pragma config WRT2 = OFF // Write Protection bit (Block 2 (004000-005FFFh) not write-protected)
#pragma config WRT3 = OFF // Write Protection bit (Block 3 (006000-007FFFh) not write-protected)
// CONFIG6H
#pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
#pragma config WRTB = OFF // Boot Block Write Protection bit (Boot block (000000-0007FFh) not write-protected)
#pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM not write-protected)
// CONFIG7L
#pragma config EBTR0 = OFF // Table Read Protection bit (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF // Table Read Protection bit (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF // Table Read Protection bit (Block 2 (004000-005FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF // Table Read Protection bit (Block 3 (006000-007FFFh) not protected from table reads executed in other blocks)
// CONFIG7H
#pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) not protected from table reads executed in other blocks)
// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.
""
Please correct me what is wrong with all the code to get the delay..
tnx.
Hey during simulation what frequency did you set for crystal oscilator and for internal oscillator?
Hi,
Crystal was set to 20MHZ as shown in simulation ckt below and delay also printed for your reference please.
Sorry for above code being repeated several times. Now here code is being pasted also..
The code is pasted here
""
#include <xc.h>
#define _XTAL_FREQ 20000000
void timer(void) // 10 -> 1us
{
T0PS0=0;
T0PS1=0;
T0PS2=0;
PSA=0; //Timer Clock Source is from Prescaler
T0CS=0; //Prescaler gets clock from FCPU (5MHz)
T08BIT=0; //16 BIT MODE
TMR0IE=1; //Enable TIMER0 Interrupt
PEIE=1; //Enable Peripheral Interrupt
GIE=1; //Enable INTs globally
TMR0ON=1; //Now start the timer!
TMR0=0;
}
void interrupt timer_isr()
{
if (TMR0IF==1)
{
value=~value;
//TMR0=0;
TMR0IF=0;
}
}
void main(void)
{
ADCON1=0b00001111;
TRISB=0;
PORTB=0;
timer();
while(1)
{
PORTB=value;
}
}
''
-------------------------------------------------------------------------------------------------------------------------------
// PIC18F2520 Configuration Bit Settings
// 'C' source line config statements
// CONFIG1H
#pragma config OSC = HS // Oscillator Selection bits (HS oscillator)
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)
// CONFIG2L
#pragma config PWRT = ON // Power-up Timer Enable bit (PWRT enabled)
#pragma config BOREN = SBORDIS // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled))
#pragma config BORV = 3 // Brown Out Reset Voltage bits (Minimum setting)
// CONFIG2H
#pragma config WDT = OFF // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))
#pragma config WDTPS = 32768 // Watchdog Timer Postscale Select bits (1:32768)
// CONFIG3H
#pragma config CCP2MX = PORTC // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = OFF // PORTB A/D Enable bit (PORTB<4:0> pins are configured as digital I/O on Reset)
#pragma config LPT1OSC = OFF // Low-Power Timer1 Oscillator Enable bit (Timer1 configured for higher power operation)
#pragma config MCLRE = ON // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)
// CONFIG4L
#pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config LVP = OFF // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)
#pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))
// CONFIG5L
#pragma config CP0 = OFF // Code Protection bit (Block 0 (000800-001FFFh) not code-protected)
#pragma config CP1 = OFF // Code Protection bit (Block 1 (002000-003FFFh) not code-protected)
#pragma config CP2 = OFF // Code Protection bit (Block 2 (004000-005FFFh) not code-protected)
#pragma config CP3 = OFF // Code Protection bit (Block 3 (006000-007FFFh) not code-protected)
// CONFIG5H
#pragma config CPB = OFF // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
#pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM not code-protected)
// CONFIG6L
#pragma config WRT0 = OFF // Write Protection bit (Block 0 (000800-001FFFh) not write-protected)
#pragma config WRT1 = OFF // Write Protection bit (Block 1 (002000-003FFFh) not write-protected)
#pragma config WRT2 = OFF // Write Protection bit (Block 2 (004000-005FFFh) not write-protected)
#pragma config WRT3 = OFF // Write Protection bit (Block 3 (006000-007FFFh) not write-protected)
// CONFIG6H
#pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
#pragma config WRTB = OFF // Boot Block Write Protection bit (Boot block (000000-0007FFh) not write-protected)
#pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM not write-protected)
// CONFIG7L
#pragma config EBTR0 = OFF // Table Read Protection bit (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF // Table Read Protection bit (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF // Table Read Protection bit (Block 2 (004000-005FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF // Table Read Protection bit (Block 3 (006000-007FFFh) not protected from table reads executed in other blocks)
// CONFIG7H
#pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) not protected from table reads executed in other blocks)
// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.
""
tnx a lot..
"You can check that by double clicking on the MCU "
At 20MHZ. Screen shot is attached for ref pl.
"the timer here is configured to work with internal frequency so what was your internal frequency?"
Would u let me know where it is mentioned in above code that the timer has configured to work with internal frequency..
As I know only one can be used at a time crystal or internal- pl update me if i am wrong..
I am trying to understand from https://circuitdigest.com/microcontroller-projects/ir-remote-controlled… as said earlier..
tnx
Hi saj,
Sorry for the late reply, I somehow missed your early post
As you can see in the program the Timmer is configured to work with internal oscillator, I am pasting the snippet below
PSA=0; //Timer Clock Source is from Prescaler
T0CS=0; //Prescaler gets clock from FCPU (5MHz)
T08BIT=0; //16 BIT MODE
TMR0IE=1; //Enable TIMER0 Interrupt
PEIE=1; //Enable Peripheral Interrupt
GIE=1; //Enable INTs globally
TMR0ON=1; //Now start the timer!
TMR0=0;
Since the bit T0CS is set to 0, which according to the datasheet will make the clock to to run on internal instruction cycle which is 5MHz in our case. The datasheet page is also pasted below for your reference.
Thx for reply..
Ok. As the clock input is either from the TMR0 pin or from the internal instruction clock. Here from the internal instruction clock. Thats correct.
As here we were using 20MHZ crystal and the internal instruction clock as your TMR0 input.
Since there's an internal divide-by-4 between the oscillator frequency and the instruction clock, this means that instruction clocks occur at a 5 MHz rate.
The TMR0 input clock (5 MHz ) is passed to the prescaler, whose divided-down output is then fed to the TMR0 register.
Now, delay in seconds:
(65536 - InitTMR0) * prescaler
Delay = -----------------------------------------
Frequency / 4In here what should be the value for "Frequency" ? shall it be 20MZH or 5MHZ.
As per my openion it should be 20MHZ, as an internal divide-by-4 between the oscillator frequency and the instruction clock here is being considered.
In other words, the value of "(Frequency / 4)" will be 5MHZ.
----
BUT in your earlier post was said that as pasted here,
"By resistor I assume that you are trying to mention Registers.The formulae to calculate timer delay can be given by
Delay = ((bit value-REG_val)*(Prescal*4))/Fosc
How did you calculate the timer intervel to be 0.4uSec?
the bit value will be 65536 for a 16 bit register and the REG_val is zero as mentioned in the while loop of the program and the prescalar is set to 2. The Focs is internal oscillator which is 5MHz so
Delay = ((65536-0)*(4*2))/(5*10^6) = 0.1 sec
The formulae I am talking about is obtained from http://www.piclist.com/techref/microchip/timer.htm
"
Please clear my understanding in comparison to above.
tnx.
Aswinth Raj
PermalinkBy resistor I assume that you are trying to mention Registers.The formulae to calculate timer delay can be given by
Delay = ((bit value-REG_val)*(Prescal*4))/Fosc
How did you calculate the timer intervel to be 0.4uSec?
the bit value will be 65536 for a 16 bit register and the REG_val is zero as mentioned in the while loop of the program and the prescalar is set to 2. The Focs is internal oscillator which is 5MHz so
Delay = ((65536-0)*(4*2))/(5*10^6) = 0.1 sec
The formulae I am talking about is obtained from http://www.piclist.com/techref/microchip/timer.htm
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