Pcb Crystal

What is exactly you want to do? Changing 433 chipset into 315 chipset?

I'm trying to layout a 12MHz crystal for a micro controller. I've been reading through several recommendations specifically for crystals as well as for high frequency design.

For the most part they seem to agree on a few things:

1. Keep traces as short as possible.
2. Keep differential trace pairs as close to the same length as possible.
3. Isolate the crystal from anything else.
4. Use ground planes beneath the crystal.
5. Avoid vias for signal lines.
6. Avoid right angle bends on traces

Here's the layout of what I currently have for my crystal:

The red represents the top PCB copper and blue is the bottom PCB layer (it's a 2-layer design). The grid is 0.25mm. There's a complete ground plane beneath the crystal (blue layer), and surrounding the crystal is a ground tied to the bottom ground plane using several vias. The trace connecting to the pin next to the clock pins is for the uC's external reset. It should be held at ~5V, and a reset is triggered when it's shorted to ground.

There are still a few questions I had:

1. I've seen a few recommended layouts which place the load capacitors closer to the IC and others which place them on the far side. What differences can I expect between the two, and which one is recommended (if any)?
2. Should I remove the ground plane from directly beneath signal traces? It seems like that would be the best way to reduce the parasitic capacitance on the signal lines.
3. Would you recommend thicker or thinner traces? Currently I have 10mil traces.
4. When should I bring the two clock signals together? I've seen recommendations where the two lines are directed essentially towards each other before heading to the uC, and other where they are kept apart and brought slowly together like I currently have.